Welcome to REBAR’s documentation!

REBAR is a a framework for designing and evaluating full-system hardware using agile teams. It is composed of a collection of tools and libraries designed to provide an intergration between open-source and commercial tools for the development of systems-on-chip. New to REBAR? Jump to the Getting Started page for more info.

Contents:

• 1. Getting Started
  • 1.1. REBAR Basics
    • 1.1.1. Generators
    • 1.1.2. Tools
    • 1.1.3. Toolchains
    • 1.1.4. Sims
    • 1.1.5. VLSI
  • 1.2. Configs, Parameters, Mix-ins, and Everything In Between
    • 1.2.1. Parameters
    • 1.2.2. Configs
    • 1.2.3. Cake Pattern
    • 1.2.4. Mix-in
    • 1.2.5. Additional References
  • 1.3. Adding An Accelerator/Device
    • 1.3.1. Integrating into the Generator Build System
    • 1.3.2. MMIO Peripheral
    • 1.3.3. Adding a RoCC Accelerator
    • 1.3.4. Adding a DMA port
  • 1.4. Initial Repository Setup
    • 1.4.1. Checking out the sources
    • 1.4.2. Building a Toolchain
  • 1.5. Running A Simulation
    • 1.5.1. Software RTL Simulation
    • 1.5.2. FPGA Accelerated Simulation
  • 1.6. SoC Generator Config Mix-ins:
    • 1.6.1. Rocket Chip
    • 1.6.2. BOOM
    • 1.6.3. SiFive Blocks
    • 1.6.4. testchipip
    • 1.6.5. Icenet
    • 1.6.6. AWL
• 2. Simulators
  • 2.1. Open Source Software RTL Simulators
    • 2.1.1. Verilator
  • 2.2. Commercial Software RTL Simulators
    • 2.2.1. VCS
  • 2.3. FPGA-Based Simulators
    • 2.3.1. FireSim
• 3. Generators
  • 3.1. Rocket
  • 3.2. Berkeley Out-of-Order Machine (BOOM)
  • 3.3. Hwacha
• 4. Tools
  • 4.1. Chisel
  • 4.2. FIRRTL
  • 4.3. Barstools
• 5. VLSI Production
  • 5.1. HAMMER

Indices and tables

• Index
• Module Index
• Search Page